Technical Safety Concept — TSRs¶
Refinement of the AFSRs (see Functional Safety Concept — Assumed FSRs) onto taktora’s concrete crates. TSRs are taktora’s own commitments — not assumed. They take the ASIL of their parent AFSR (B(D)).
Each TSR carries a status field describing today’s implementation state, with the convention:
implemented— current code satisfies (references concrete FEAT/REQ/BB IDs).draft— requires extension to existing crate (gap analysis pending).
The bounded allocator (
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The bounded allocator shall maintain partitioned quotas per integrity level, such that exhaustion of the QM-grade pool cannot deny allocation from the safety-critical pool.
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Each
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Missed-deadline detection shall fire within one cycle of the
configured interval and propagate via
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The
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Technical Safety Requirement: Single-publisher iceoryx2 topology for safety-critical channels TSR_0007
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iceoryx2 services backing safety-critical channels shall be configured with single-publisher topology; the publisher process holds the only write capability over the underlying shared-memory segment.
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The
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Taktora shall provide a hosting mode in which safety-critical items and QM-grade items run in distinct OS processes communicating exclusively through iceoryx2 shared-memory channels with per-process read/write capability.
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The safety-critical executor process shall emit a heartbeat
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The executor shall verify that the spatial-isolation context is intact before admitting a safety-critical item into the runnable set on each cold start; a failed verification shall refuse admission and surface a fault without dispatching any item.
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TSR coverage summary¶
ID |
Title |
Status |
Refines |
|---|---|---|---|
Bounded allocator hard caps |
implemented |
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Per-integrity-level allocation quotas |
implemented |
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Integrity-level declaration and process isolation |
implemented |
||
Missed-deadline detection within one cycle |
implemented |
||
Compile-time channel directionality |
implemented |
||
Bounded health-event latency |
approved |
||
Single-publisher iceoryx2 topology for safety-critical channels |
implemented |
||
Envelope sequence + CRC integrity |
implemented |
||
Cross-process hosting mode |
implemented |
||
Heartbeat for Element B monitor |
implemented |
||
Cold-start integrity-verification admission gate |
implemented |
10
implemented— TSR_0001..TSR_0005, TSR_0007..TSR_0011.1
approved— TSR_0006 (pending a measured FTTI/2 latency test).
AFSR coverage. This concept refines AFSR_0001..AFSR_0005 onto 11 TSRs. AFSR_0005 (startup integrity verification) is refined by TSR_0011, the cold-start admission gate — the admission-time companion to the TSR_0003 process-isolation invariant.
Covering test:: cases for the context-based isolation work item live
in Verification — context-based isolation.